[RTL] Multi-Vt and Doping: Same Gate, Different Speeds
When an RTL engineer analyzes the synthesis results, he or she may find that the same AND2 gate has a subtly different name.
-
-
[Semiconductor Metrology] Measuring the Thickness of Invisible Films: Ellipsometry and Alpha Step
When manufacturing semiconductor chips, we say, "We deposited 5nm of HfO2."
-
AI Architecture 15. The Heart of Systolic Array
The Von Neumann architecture, the origin of modern computing, separates the 'Processing Unit (CPU)' from the 'Storage Unit (Memory)'.
-
AI Architecture 14. Dataflow Taxonomy: TPU vs Output Stationary vs Row Stationary
In the previous post, we quantitatively confirmed that hardware performance limits ...
-
AI Architecture 13. Roofline Model Analysis
In our previous posts, we discussed the two main culprits degrading deep learning model performance:
-
AI Architecture 12. Skip Connection: ResNet and Bottlenecks
In the previous MLP and Memory Wall, we discussed the "memory wall" phenomenon, where memory bandwidth limits system performance. In CNN and Locality,
