It's been a really long time since I wrote about RRAM, so I thought I'd summarize it before it completely fades from my memory.<\/p>\n\n\n\n
In the previous two parts, we explored the operating principles (filament theory) and characteristics of a single RRAM device. However, in the semiconductor business, a single device has no value. Billions of devices must be integrated to create a \"memory chip.\"<\/p>\n\n\n\n
The primary reason RRAM is attracting attention as a next-generation memory is its Crossbar Array<\/strong> architecture, which theoretically allows for the smallest possible area. However, this architecture suffers from a critical drawback: Sneak Path Current (leakage current).<\/p>\n\n\n\n In this article, we will explain the Crossbar Array structure that determines the integration density of RRAM, the Sneak Path Current that interferes with it, and the Selector<\/strong> technology that is the solution.<\/p>\n\n\n