{"id":1099,"date":"2025-12-15T10:13:41","date_gmt":"2025-12-15T01:13:41","guid":{"rendered":"https:\/\/rtlearner.com\/?p=1099"},"modified":"2025-12-23T11:22:43","modified_gmt":"2025-12-23T02:22:43","slug":"rtl-sram-analyze-1","status":"publish","type":"post","link":"https:\/\/rtlearner.com\/en\/rtl-sram-analyze-1\/","title":{"rendered":"[SRAM 1\ud3b8] SRAM\uc758 \uae30\ubcf8 \uac1c\ub150\uacfc Port \uad6c\uc131 \uc815\ub9ac (Single, Simple, True Dual)"},"content":{"rendered":"\n<p class=\"wp-block-paragraph\">\ub514\uc9c0\ud138 \ud68c\ub85c \uc124\uacc4(Digital Design)\uc5d0\uc11c \ub85c\uc9c1(Logic)\ub9cc\ud07c\uc774\ub098 \uc911\uc694\ud55c \uac83\uc774 \ubc14\ub85c \ub370\uc774\ud130\ub97c \uc800\uc7a5\ud558\ub294 \uba54\ubaa8\ub9ac(Memory)\uc785\ub2c8\ub2e4. FPGA\ub098 ASIC \uc124\uacc4\ub97c \ud558\ub2e4 \ubcf4\uba74 \ub2e8\uc21c\ud788 <code>reg<\/code>\ub098 D-FlipFlop\uc744 \uc0ac\uc6a9\ud558\ub294 \uac83\uc744 \ub118\uc5b4, \ub300\uc6a9\ub7c9 \ub370\uc774\ud130\ub97c \ud6a8\uc728\uc801\uc73c\ub85c \uad00\ub9ac\ud558\uae30 \uc704\ud574 SRAM(Static Random Access Memory)\uc744 \ubc18\ub4dc\uc2dc \uc0ac\uc6a9\ud558\uac8c \ub429\ub2c8\ub2e4.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">\ud558\uc9c0\ub9cc \ub9c9\uc0c1 \uba54\ubaa8\ub9ac\ub97c \uc778\uc2a4\ud134\uc2a4(Instantiation) \ud558\ub824\uace0 IP Catalog\ub97c \uc5f4\uac70\ub098 Memory Compiler \uc2a4\ud399\uc744 \ubcf4\uba74, <strong>Single Port, Simple Dual Port, True Dual Port<\/strong> \ub4f1 \ub2e4\uc591\ud55c \uc635\uc158 \uc55e\uc5d0\uc11c \ud63c\ub780\uc744 \uacaa\uae30 \uc27d\uc2b5\ub2c8\ub2e4.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">\uc774\ubc88 \uae00\uc5d0\uc11c\ub294 \uc5d4\uc9c0\ub2c8\uc5b4\uc758 \uad00\uc810\uc5d0\uc11c SRAM\uc774 \ub808\uc9c0\uc2a4\ud130\uc640 \uc5b4\ub5bb\uac8c \ub2e4\ub978\uc9c0, \uadf8\ub9ac\uace0 \ud3ec\ud2b8(Port) \uad6c\uc131\uc5d0 \ub530\ub77c \uc5b4\ub5a4 \uc885\ub958\uac00 \uc788\uc73c\uba70 \uc5b8\uc81c \uc0ac\uc6a9\ud574\uc57c \ud558\ub294\uc9c0 \uba85\ud655\ud558\uac8c \uc815\ub9ac\ud574 \ubcf4\uaca0\uc2b5\ub2c8\ub2e4.<\/p>\n\n\n<style>.kb-table-of-content-nav.kb-table-of-content-id1099_ae4a9d-8c .kb-table-of-content-wrap{padding-top:var(--global-kb-spacing-sm, 1.5rem);padding-right:var(--global-kb-spacing-sm, 1.5rem);padding-bottom:var(--global-kb-spacing-sm, 1.5rem);padding-left:var(--global-kb-spacing-sm, 1.5rem);box-shadow:0px 0px 14px 0px rgba(0, 0, 0, 0.2);}.kb-table-of-content-nav.kb-table-of-content-id1099_ae4a9d-8c .kb-table-of-contents-title-wrap{padding-top:0px;padding-right:0px;padding-bottom:0px;padding-left:0px;}.kb-table-of-content-nav.kb-table-of-content-id1099_ae4a9d-8c .kb-table-of-contents-title{font-weight:regular;font-style:normal;}.kb-table-of-content-nav.kb-table-of-content-id1099_ae4a9d-8c .kb-table-of-content-wrap .kb-table-of-content-list{font-weight:regular;font-style:normal;margin-top:var(--global-kb-spacing-sm, 1.5rem);margin-right:0px;margin-bottom:0px;margin-left:0px;}@media all and (max-width: 767px){.kb-table-of-content-nav.kb-table-of-content-id1099_ae4a9d-8c .kb-table-of-contents-title{font-size:var(--global-kb-font-size-md, 1.25rem);}.kb-table-of-content-nav.kb-table-of-content-id1099_ae4a9d-8c .kb-table-of-content-wrap .kb-table-of-content-list{font-size:var(--global-kb-font-size-sm, 0.9rem);}}<\/style>\n\n<style>.kadence-column1099_5adb78-6d > .kt-inside-inner-col{box-shadow:0px 0px 14px 0px rgba(0, 0, 0, 0.2);}.kadence-column1099_5adb78-6d > .kt-inside-inner-col,.kadence-column1099_5adb78-6d > .kt-inside-inner-col:before{border-top-left-radius:0px;border-top-right-radius:0px;border-bottom-right-radius:0px;border-bottom-left-radius:0px;}.kadence-column1099_5adb78-6d > .kt-inside-inner-col{column-gap:var(--global-kb-gap-sm, 1rem);}.kadence-column1099_5adb78-6d > .kt-inside-inner-col{flex-direction:column;}.kadence-column1099_5adb78-6d > .kt-inside-inner-col > .aligncenter{width:100%;}.kadence-column1099_5adb78-6d > .kt-inside-inner-col:before{opacity:0.3;}.kadence-column1099_5adb78-6d{position:relative;}@media all and (max-width: 1024px){.kadence-column1099_5adb78-6d > .kt-inside-inner-col{flex-direction:column;justify-content:center;}}@media all and (max-width: 767px){.kadence-column1099_5adb78-6d > .kt-inside-inner-col{flex-direction:column;justify-content:center;}}<\/style>\n<div class=\"wp-block-kadence-column kadence-column1099_5adb78-6d\"><div class=\"kt-inside-inner-col\">\n<p class=\"wp-block-paragraph\"><strong>\uad00\ub828 \uae00<\/strong><\/p>\n\n\n\n<p class=\"wp-block-paragraph\">\u2705<a href=\"https:\/\/rtlearner.com\/fpga-block-memory-setup-guide\/\">[FPGA] Block memory \ubaa8\ub4c8 \uc124\uc815 \ubc0f \uc0ac\uc6a9 \uac00\uc774\ub4dc<\/a><\/p>\n\n\n\n<p class=\"wp-block-paragraph\">\u2705<a href=\"https:\/\/rtlearner.com\/rtl-sram-analyze-2\/\">[SRAM 2\ud3b8] \uc2e4\uc804 SRAM Verilog! FPGA vs ASIC \ucc28\uc774\uc810 \ubd84\uc11d<\/a><\/p>\n\n\n\n<p class=\"wp-block-paragraph\">\u2705<a href=\"https:\/\/rtlearner.com\/rtl-sram-analyze-3\/\" data-type=\"post\" data-id=\"1107\">[SRAM 3\ud3b8] ASIC \uc124\uacc4\uc790\uc758 SRAM \uc120\ud0dd \uac00\uc774\ub4dc: HDE vs HSE, HVT vs RVT<\/a><\/p>\n<\/div><\/div>\n\n\n\n<h2 class=\"wp-block-heading\">1. D-FlipFlop(Register) vs SRAM: \uc65c SRAM\uc744 \uc4f0\ub294\uac00?<\/h2>\n\n\n\n<p class=\"wp-block-paragraph\">\ub514\uc9c0\ud138 \ub17c\ub9ac\ud68c\ub85c \uc218\uc5c5 \uc2dc\uac04\uc5d0 \uac00\uc7a5 \uba3c\uc800 \ubc30\uc6b0\ub294 \uc800\uc7a5 \uc18c\uc790\ub294 \ub798\uce58(Latch)\uc640 \ud50c\ub9bd\ud50c\ub86d(Flip-Flop)\uc785\ub2c8\ub2e4. \uadf8\ub7f0\ub370 \uce69 \ub0b4\ubd80\uc5d0\uc11c \uc65c \uad73\uc774 \ubcf5\uc7a1\ud55c SRAM \ube14\ub85d\uc744 \ub530\ub85c \uc0ac\uc6a9\ud560\uae4c\uc694? \ud575\uc2ec\uc740 \uba74\uc801 \ud6a8\uc728(Density)\uc5d0 \uc788\uc2b5\ub2c8\ub2e4.<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>D-FlipFlop (Register):<\/strong> 1\ube44\ud2b8\ub97c \uc800\uc7a5\ud558\uae30 \uc704\ud574 \ubcf4\ud1b5 20~30\uac1c \uc774\uc0c1\uc758 \ud2b8\ub79c\uc9c0\uc2a4\ud130\uac00 \ud544\uc694\ud558\uba70, \ud074\ub7ed \ub77c\uc6b0\ud305\uacfc \ub9ac\uc14b \ub85c\uc9c1 \ub4f1\uc73c\ub85c \uc778\ud574 \uba74\uc801\uc744 \ub9ce\uc774 \ucc28\uc9c0\ud569\ub2c8\ub2e4. \ub300\uc2e0 \uc18d\ub3c4\uac00 \ub9e4\uc6b0 \ube60\ub974\uace0 \uac12\uc744 \ubc14\ub85c \uaebc\ub0b4 \uc4f8 \uc218 \uc788\uc2b5\ub2c8\ub2e4.<\/li>\n\n\n\n<li><strong>SRAM (Static RAM):<\/strong> 1\ube44\ud2b8\ub97c \uc800\uc7a5\ud558\ub294 \ub370 \ud45c\uc900\uc801\uc73c\ub85c 6\uac1c\uc758 \ud2b8\ub79c\uc9c0\uc2a4\ud130(6T Cell)\ub9cc \uc0ac\uc6a9\ud569\ub2c8\ub2e4. \ub798\uce58 \uad6c\uc870\ub97c \uc11c\ub85c \ub9de\ubb3c\ub824 \ub193\uc740 \ud615\ud0dc\uc774\uba70, Refresh\uac00 \ud544\uc694\ud55c DRAM\uacfc \ub2ec\ub9ac \uc804\uc6d0\ub9cc \uacf5\uae09\ub418\uba74 \ub370\uc774\ud130\uac00 \uc720\uc9c0\ub429\ub2c8\ub2e4.<\/li>\n<\/ul>\n\n\n\n<p class=\"wp-block-paragraph\">\ub9cc\uc57d 1MB(\uc57d 8\ubc31\ub9cc \ube44\ud2b8) \uc6a9\ub7c9\uc758 \ub370\uc774\ud130\ub97c Flip-Flop\uc73c\ub85c\ub9cc \uad6c\ud604\ud55c\ub2e4\uba74, \uce69 \uba74\uc801\uc758 \ub300\ubd80\ubd84\uc744 \ucc28\uc9c0\ud558\uc5ec \ube44\ud6a8\uc728\uc801\uc77c \uac83\uc785\ub2c8\ub2e4. \ub530\ub77c\uc11c <strong>\uc801\uc740 \uc6a9\ub7c9\uacfc \ube60\ub978 \uc81c\uc5b4\ub294 Register<\/strong>\ub85c, <strong>\ub300\uc6a9\ub7c9 \ub370\uc774\ud130 \uc800\uc7a5\uc740 SRAM<\/strong>\uc73c\ub85c \ub098\ub204\uc5b4 \uc124\uacc4\ud558\ub294 \uac83\uc774 \uae30\ubcf8 \uc6d0\uce59\uc785\ub2c8\ub2e4.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">2. SRAM\uc758 \ub3d9\uc791 \uc6d0\ub9ac\uc640 Port\uc758 \uac1c\ub150<\/h2>\n\n\n\n<p class=\"wp-block-paragraph\">SRAM\uc740 \ub370\uc774\ud130\ub97c \uc800\uc7a5\ud558\ub294 &#8216;Cell Array&#8217;\uc640 \uc678\ubd80\uc640 \uc18c\ud1b5\ud558\ub294 &#8216;Interface&#8217;\ub85c \uad6c\uc131\ub429\ub2c8\ub2e4. \uc774 \uc778\ud130\ud398\uc774\uc2a4\ub97c \uc6b0\ub9ac\ub294 \ud3ec\ud2b8(Port)\ub77c\uace0 \ubd80\ub985\ub2c8\ub2e4.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">\ud3ec\ud2b8\ub294 \uae30\ubcf8\uc801\uc73c\ub85c \ub2e4\uc74c \uc2e0\ud638\ub4e4\uc758 \ubb36\uc74c\uc785\ub2c8\ub2e4.<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Address:<\/strong> \ub370\uc774\ud130\uac00 \uc800\uc7a5\ub41c \uc704\uce58 \uc8fc\uc18c<\/li>\n\n\n\n<li><strong>Data In\/Out:<\/strong> \uc4f0\uace0 \uc77d\uc744 \ub370\uc774\ud130<\/li>\n\n\n\n<li><strong>Control:<\/strong> Enable(\ud65c\uc131\ud654), Write Enable(\uc4f0\uae30 \uc81c\uc5b4), Clock<\/li>\n<\/ul>\n\n\n\n<p class=\"wp-block-paragraph\">\ud3ec\ud2b8\uac00 \ub9ce\uc744\uc218\ub85d \ub3d9\uc2dc\uc5d0 \uc5ec\ub7ec \uc791\uc5c5\uc744 \uc218\ud589\ud560 \uc218 \uc788\uc5b4 \ub300\uc5ed\ud3ed(Bandwidth)\uc774 \ub298\uc5b4\ub098\uc9c0\ub9cc, SRAM Cell \ub0b4\ubd80\uc758 \ubc30\uc120\uc774 \ubcf5\uc7a1\ud574\uc838 <strong>\uba74\uc801\uc774 \ucee4\uc9c0\ub294 \ub2e8\uc810<\/strong>\uc774 \uc788\uc2b5\ub2c8\ub2e4. \ub530\ub77c\uc11c \uc124\uacc4 \ubaa9\uc801\uc5d0 \ub531 \ub9de\ub294 \ucd5c\uc18c\ud55c\uc758 \ud3ec\ud2b8 \uad6c\uc131\uc744 \uc120\ud0dd\ud558\ub294 \uac83\uc774 \uc911\uc694\ud569\ub2c8\ub2e4.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">3. \uae30\ub2a5\uc5d0 \ub530\ub978 SRAM\uc758 3\uac00\uc9c0 \ubd84\ub958<\/h2>\n\n\n\n<p class=\"wp-block-paragraph\">\uc124\uacc4 \ud234(Vivado, Quartus, Memory Compiler \ub4f1)\uc5d0\uc11c \uac00\uc7a5 \ud754\ud558\uac8c \uc811\ud558\ub294 \uc138 \uac00\uc9c0 \uc720\ud615\uc744 \uc0c1\uc138\ud788 \uc54c\uc544\ubcf4\uaca0\uc2b5\ub2c8\ub2e4.<\/p>\n\n\n<style>.kb-image1099_d186fc-82.kb-image-is-ratio-size, .kb-image1099_d186fc-82 .kb-image-is-ratio-size{max-width:650px;width:100%;}.wp-block-kadence-column > .kt-inside-inner-col > .kb-image1099_d186fc-82.kb-image-is-ratio-size, .wp-block-kadence-column > .kt-inside-inner-col > .kb-image1099_d186fc-82 .kb-image-is-ratio-size{align-self:unset;}.kb-image1099_d186fc-82 figure{max-width:650px;}.kb-image1099_d186fc-82 .image-is-svg, .kb-image1099_d186fc-82 .image-is-svg img{width:100%;}.kb-image1099_d186fc-82 .kb-image-has-overlay:after{opacity:0.3;}@media all and (max-width: 767px){.kb-image1099_d186fc-82.kb-image-is-ratio-size, .kb-image1099_d186fc-82 .kb-image-is-ratio-size{max-width:280px;width:100%;}.kb-image1099_d186fc-82 figure{max-width:280px;}}<\/style>\n<div class=\"wp-block-kadence-image kb-image1099_d186fc-82\"><figure class=\"aligncenter size-large\"><img data-dominant-color=\"eeeeee\" data-has-transparency=\"false\" style=\"--dominant-color: #eeeeee;\" loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"350\" src=\"https:\/\/rtlearner.com\/wp-content\/uploads\/2025\/12\/SRAM-port-\uc124\uba85-1024x350.jpg\" alt=\"\" class=\"kb-img wp-image-1100 not-transparent\" srcset=\"https:\/\/rtlearner.com\/wp-content\/uploads\/2025\/12\/SRAM-port-\uc124\uba85-1024x350.jpg 1024w, https:\/\/rtlearner.com\/wp-content\/uploads\/2025\/12\/SRAM-port-\uc124\uba85-300x103.jpg 300w, https:\/\/rtlearner.com\/wp-content\/uploads\/2025\/12\/SRAM-port-\uc124\uba85-768x262.jpg 768w, https:\/\/rtlearner.com\/wp-content\/uploads\/2025\/12\/SRAM-port-\uc124\uba85.jpg 1200w\" sizes=\"auto, (max-width: 1024px) 100vw, 1024px\" \/><figcaption>SRAM port \uc124\uba85<\/figcaption><\/figure><\/div>\n\n\n\n<h3 class=\"wp-block-heading\">\u2460 Single Port (1RW)<\/h3>\n\n\n\n<p class=\"wp-block-paragraph\">\uac00\uc7a5 \uae30\ubcf8\uc801\uc774\uace0 \uba74\uc801\uc774 \uc791\uc740 \ud615\ud0dc\uc785\ub2c8\ub2e4. \ud558\ub098\uc758 \ud3ec\ud2b8\ub9cc \uc874\uc7ac\ud558\ubbc0\ub85c, <strong>\ud55c \ud074\ub7ed \uc0ac\uc774\ud074\uc5d0 &#8216;\uc77d\uae30(Read)&#8217; \ub610\ub294 &#8216;\uc4f0\uae30(Write)&#8217; \uc911 \ub531 \ud558\ub098\ub9cc<\/strong> \uc218\ud589\ud560 \uc218 \uc788\uc2b5\ub2c8\ub2e4.<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>\ud2b9\uc9d5:<\/strong>\n<ul class=\"wp-block-list\">\n<li>Address \ubc84\uc2a4\uac00 \ud558\ub098\uc785\ub2c8\ub2e4.<\/li>\n\n\n\n<li>Data In\uacfc Data Out \ud3ec\ud2b8\uac00 \ubd84\ub9ac\ub418\uc5b4 \uc788\uc744 \uc218\ub3c4, \ud558\ub098\ub85c \ud569\uccd0\uc838 \uc788\uc744 \uc218\ub3c4(Bi-directional) \uc788\uc2b5\ub2c8\ub2e4.<\/li>\n\n\n\n<li>\uba74\uc801(Area)\uc774 \uac00\uc7a5 \uc791\uc2b5\ub2c8\ub2e4 (High Density).<\/li>\n<\/ul>\n<\/li>\n\n\n\n<li><strong>\uc5b8\uc81c \uc4f0\ub294\uac00?<\/strong>\n<ul class=\"wp-block-list\">\n<li>\ub3d9\uc2dc \uc811\uadfc\uc774 \ud544\uc694 \uc5c6\ub294 \uacbd\uc6b0.<\/li>\n\n\n\n<li>CPU\uc758 Instruction Memory\ucc98\ub7fc \uc8fc\ub85c \uc77d\uae30\ub9cc \ud558\ub294 \uacbd\uc6b0.<\/li>\n\n\n\n<li>Look-up Table (LUT) \uc6a9\ub3c4.<\/li>\n\n\n\n<li>\uba74\uc801\uc744 \ucd5c\uc18c\ud654\ud574\uc57c \ud558\ub294 \ub300\uc6a9\ub7c9 \ubc84\ud37c.<\/li>\n<\/ul>\n<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\">\u2461 Simple Dual Port (Pseudo Dual Port \/ 1R1W)<\/h3>\n\n\n\n<p class=\"wp-block-paragraph\">&#8216;Simple&#8217;\uc774\ub77c\ub294 \ub2e8\uc5b4 \ub54c\ubb38\uc5d0 \uae30\ub2a5\uc774 \uc801\uc5b4 \ubcf4\uc774\uc9c0\ub9cc, \uc2e4\uc81c\ub85c\ub294 <strong>FIFO(First-In First-Out) \uc124\uacc4<\/strong>\uc758 \ud575\uc2ec\uc774 \ub418\ub294 \ub9e4\uc6b0 \uc911\uc694\ud55c \uad6c\uc870\uc785\ub2c8\ub2e4. FPGA\uc5d0\uc11c\ub294 \uc885\uc885 Pseudo Dual Port\ub77c\uace0\ub3c4 \ubd88\ub9bd\ub2c8\ub2e4.<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>\uad6c\uc870:<\/strong> \ub450 \uac1c\uc758 \ud3ec\ud2b8(Port A, Port B)\ub97c \uac00\uc9d1\ub2c8\ub2e4.\n<ul class=\"wp-block-list\">\n<li><strong>Port A:<\/strong> \uc4f0\uae30 \uc804\uc6a9 (Write Only)<\/li>\n\n\n\n<li><strong>Port B:<\/strong> \uc77d\uae30 \uc804\uc6a9 (Read Only)<\/li>\n<\/ul>\n<\/li>\n\n\n\n<li><strong>\ud2b9\uc9d5:<\/strong>\n<ul class=\"wp-block-list\">\n<li>\uc11c\ub85c \ub2e4\ub978 \uc8fc\uc18c\uc5d0 \ub300\ud574 <strong>\ub3d9\uc2dc\uc5d0 \uc77d\uace0 \uc4f0\uae30\uac00 \uac00\ub2a5<\/strong>\ud569\ub2c8\ub2e4.<\/li>\n\n\n\n<li>Single Port\ubcf4\ub2e4\ub294 \ud06c\uc9c0\ub9cc True Dual Port\ubcf4\ub2e4\ub294 \uc791\uc2b5\ub2c8\ub2e4.<\/li>\n<\/ul>\n<\/li>\n\n\n\n<li><strong>\uc5b8\uc81c \uc4f0\ub294\uac00?<\/strong>\n<ul class=\"wp-block-list\">\n<li><strong>FIFO:<\/strong> \ud55c\ucabd\uc5d0\uc11c\ub294 \ub370\uc774\ud130\ub97c \uacc4\uc18d \uc313\uace0(Write), \ub2e4\ub978 \ucabd\uc5d0\uc11c\ub294 \uacc4\uc18d \uaebc\ub0b4\uac00\ub294(Read) \uad6c\uc870\uc5d0 \ucd5c\uc801\ud654\ub418\uc5b4 \uc788\uc2b5\ub2c8\ub2e4.<\/li>\n\n\n\n<li>\ub370\uc774\ud130 \ub85c\uae45 \uc2dc\uc2a4\ud15c.<\/li>\n<\/ul>\n<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\">\u2462 True Dual Port (2RW)<\/h3>\n\n\n\n<p class=\"wp-block-paragraph\">\uac00\uc7a5 \uc720\uc5f0\ud558\uc9c0\ub9cc, \uac00\uc7a5 \ube44\uc2fc(\uba74\uc801\uacfc \uc804\ub825 \uce21\uba74\uc5d0\uc11c) \uad6c\uc870\uc785\ub2c8\ub2e4. \ub450 \uac1c\uc758 \ud3ec\ud2b8\uac00 \uc644\uc804\ud788 \ub3c5\ub9bd\uc801\uc73c\ub85c \ub3d9\uc791\ud569\ub2c8\ub2e4.<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>\uad6c\uc870:<\/strong> Port A\uc640 Port B\uac00 \uc644\ubcbd\ud558\uac8c \ub300\uce6d\uc785\ub2c8\ub2e4.\n<ul class=\"wp-block-list\">\n<li><strong>Port A:<\/strong> Read \/ Write \ubaa8\ub450 \uac00\ub2a5<\/li>\n\n\n\n<li><strong>Port B:<\/strong> Read \/ Write \ubaa8\ub450 \uac00\ub2a5<\/li>\n<\/ul>\n<\/li>\n\n\n\n<li><strong>\ud2b9\uc9d5:<\/strong>\n<ul class=\"wp-block-list\">\n<li>\ub450 \ud3ec\ud2b8\uac00 \uc11c\ub85c \ub2e4\ub978 \uc8fc\uc18c\uc5d0 \ub300\ud574 \ub3d9\uc2dc\uc5d0 Write\/Write, Read\/Read, Read\/Write\uac00 \uac00\ub2a5\ud569\ub2c8\ub2e4.<\/li>\n\n\n\n<li><strong>\uc8fc\uc758\uc810(Collision):<\/strong> \ub9cc\uc57d \ub450 \ud3ec\ud2b8\uac00 &#8216;\ub3d9\uc77c\ud55c \uc8fc\uc18c&#8217;\uc5d0 \ub3d9\uc2dc\uc5d0 \uc4f0\uae30\ub97c \uc2dc\ub3c4\ud558\uac70\ub098, \ud55c\ucabd\uc740 \uc4f0\uace0 \ud55c\ucabd\uc740 \uc77d\uc73c\ub824 \ud558\uba74 \ub370\uc774\ud130\uac00 \uae68\uc9c0\uac70\ub098 \uc54c \uc218 \uc5c6\ub294 \uac12(Unknown)\uc774 \ub420 \uc218 \uc788\uc2b5\ub2c8\ub2e4. \uc774\ub97c \ubc29\uc9c0\ud558\uae30 \uc704\ud55c \ucda9\ub3cc \ubc29\uc9c0 \ub85c\uc9c1(Collision Avoidance Logic)\uc774 \ud544\uc694\ud560 \uc218 \uc788\uc2b5\ub2c8\ub2e4.<\/li>\n<\/ul>\n<\/li>\n\n\n\n<li><strong>\uc5b8\uc81c \uc4f0\ub294\uac00?<\/strong>\n<ul class=\"wp-block-list\">\n<li><strong>Shared Memory:<\/strong> \ub450 \uac1c\uc758 \uc11c\ub85c \ub2e4\ub978 \ub9c8\uc2a4\ud130(\uc608: CPU\uc640 \ud558\ub4dc\uc6e8\uc5b4 \uac00\uc18d\uae30)\uac00 \ud558\ub098\uc758 \uba54\ubaa8\ub9ac\ub97c \uacf5\uc720\ud558\uba70 \ub370\uc774\ud130\ub97c \uc8fc\uace0\ubc1b\uc744 \ub54c.<\/li>\n\n\n\n<li>\ubcf5\uc7a1\ud55c \uce90\uc2dc(Cache) \uad6c\uc870\ub098 \uc2a4\ud06c\ub798\uce58\ud328\ub4dc \uba54\ubaa8\ub9ac.<\/li>\n<\/ul>\n<\/li>\n<\/ul>\n\n\n\n<h2 class=\"wp-block-heading\">4. \uc694\uc57d \ubc0f \ube44\uad50<\/h2>\n\n\n\n<figure class=\"wp-block-table\"><table class=\"has-fixed-layout\"><thead><tr><td><strong>\uad6c\ubd84<\/strong><\/td><td><strong>\ud3ec\ud2b8 \uad6c\uc131<\/strong><\/td><td><strong>\ub3d9\uc2dc \ub3d9\uc791<\/strong><\/td><td><strong>\uc8fc\uc694 \uc6a9\ub3c4<\/strong><\/td><td><strong>\uba74\uc801(\uc0c1\ub300\uc801)<\/strong><\/td><\/tr><\/thead><tbody><tr><td><strong>Single Port<\/strong><\/td><td>1\uac1c (RW \uacf5\uc6a9)<\/td><td>\ubd88\uac00 (R or W)<\/td><td>LUT, \ub2e8\uc21c \ubc84\ud37c<\/td><td>Small<\/td><\/tr><tr><td><strong>Simple Dual Port<\/strong><\/td><td>2\uac1c (1 Write, 1 Read)<\/td><td>\uac00\ub2a5 (Write &amp; Read)<\/td><td>FIFO, \ubc84\ud37c\ub9c1<\/td><td>Medium<\/td><\/tr><tr><td><strong>True Dual Port<\/strong><\/td><td>2\uac1c (2 RW)<\/td><td>\uac00\ub2a5 (Any Mix)<\/td><td>\uba40\ud2f0 \ud504\ub85c\uc138\uc11c \uacf5\uc720 \uba54\ubaa8\ub9ac<\/td><td>Large<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n<h2 class=\"wp-block-heading\">5. \ub9c8\ubb34\ub9ac<\/h2>\n\n\n\n<p class=\"wp-block-paragraph\">SRAM\uc744 \uc120\ud0dd\ud560 \ub54c\ub294 \ubb34\uc870\uac74 \uae30\ub2a5\uc774 \ub9ce\uc740 True Dual Port\ub97c \uace0\ub974\ub294 \uac83\uc774 \ub2a5\uc0ac\uac00 \uc544\ub2d9\ub2c8\ub2e4. True Dual Port\ub294 Single Port \ub300\ube44 \uba74\uc801\uc774 \uc57d 2\ubc30 \uac00\uae4c\uc774 \ucee4\uc9c8 \uc218 \uc788\uc73c\uba70, \uc804\ub825 \uc18c\ubaa8\ub3c4 \ud07d\ub2c8\ub2e4. \ub530\ub77c\uc11c \uc124\uacc4\ud558\ub824\ub294 \ubaa8\ub4c8\uc758 \ub370\uc774\ud130 \ud750\ub984(Data Flow)\uc744 \uc815\ud655\ud788 \ud30c\uc545\ud558\uc5ec \uaf2d \ud544\uc694\ud55c \ud3ec\ud2b8 \uad6c\uc131\uc744 \uc120\ud0dd\ud558\ub294 \uac83\uc774 \ucd5c\uc801\ud654\uc758 \uccab\uac78\uc74c\uc785\ub2c8\ub2e4.<\/p>\n\n\n<style>.kadence-column1099_d6b4a5-1e > .kt-inside-inner-col{box-shadow:0px 0px 14px 0px rgba(0, 0, 0, 0.2);}.kadence-column1099_d6b4a5-1e > .kt-inside-inner-col,.kadence-column1099_d6b4a5-1e > .kt-inside-inner-col:before{border-top-left-radius:0px;border-top-right-radius:0px;border-bottom-right-radius:0px;border-bottom-left-radius:0px;}.kadence-column1099_d6b4a5-1e > .kt-inside-inner-col{column-gap:var(--global-kb-gap-sm, 1rem);}.kadence-column1099_d6b4a5-1e > .kt-inside-inner-col{flex-direction:column;}.kadence-column1099_d6b4a5-1e > .kt-inside-inner-col > .aligncenter{width:100%;}.kadence-column1099_d6b4a5-1e > .kt-inside-inner-col:before{opacity:0.3;}.kadence-column1099_d6b4a5-1e{position:relative;}@media all and (max-width: 1024px){.kadence-column1099_d6b4a5-1e > .kt-inside-inner-col{flex-direction:column;justify-content:center;}}@media all and (max-width: 767px){.kadence-column1099_d6b4a5-1e > .kt-inside-inner-col{flex-direction:column;justify-content:center;}}<\/style>\n<div class=\"wp-block-kadence-column kadence-column1099_d6b4a5-1e\"><div class=\"kt-inside-inner-col\">\n<p class=\"wp-block-paragraph\"><strong>\uad00\ub828 \uae00<\/strong><\/p>\n\n\n\n<p class=\"wp-block-paragraph\">\u2705<a href=\"https:\/\/rtlearner.com\/fpga-block-memory-setup-guide\/\">[FPGA] Block memory \ubaa8\ub4c8 \uc124\uc815 \ubc0f \uc0ac\uc6a9 \uac00\uc774\ub4dc<\/a><\/p>\n\n\n\n<p class=\"wp-block-paragraph\">\u2705<a href=\"https:\/\/rtlearner.com\/rtl-sram-analyze-2\/\">[SRAM 2\ud3b8] \uc2e4\uc804 SRAM Verilog! FPGA vs ASIC \ucc28\uc774\uc810 \ubd84\uc11d<\/a><\/p>\n\n\n\n<p class=\"wp-block-paragraph\">\u2705<a href=\"https:\/\/rtlearner.com\/rtl-sram-analyze-3\/\" data-type=\"post\" data-id=\"1107\">[SRAM 3\ud3b8] ASIC \uc124\uacc4\uc790\uc758 SRAM \uc120\ud0dd \uac00\uc774\ub4dc: HDE vs HSE, HVT vs RVT<\/a><\/p>\n<\/div><\/div>\n\n\n\n<p class=\"wp-block-paragraph\">\ucc38\uace0: <a href=\"https:\/\/share.google\/HfI8JE5WukYRgHWHb\" target=\"_blank\" rel=\"noopener\">AMD<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"<p>In digital circuit design, what is just as important as logic is the data storage\u2026<\/p>","protected":false},"author":1,"featured_media":1101,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_kadence_starter_templates_imported_post":false,"_kad_post_transparent":"","_kad_post_title":"","_kad_post_layout":"","_kad_post_sidebar_id":"","_kad_post_content_style":"","_kad_post_vertical_padding":"","_kad_post_feature":"","_kad_post_feature_position":"","_kad_post_header":false,"_kad_post_footer":false,"_kad_post_classname":"","footnotes":""},"categories":[2],"tags":[10,106,107,113],"class_list":["post-1099","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-rtl-engineer","tag-fpga","tag-asic","tag-rtl","tag-sram"],"_links":{"self":[{"href":"https:\/\/rtlearner.com\/en\/wp-json\/wp\/v2\/posts\/1099","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/rtlearner.com\/en\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/rtlearner.com\/en\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/rtlearner.com\/en\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/rtlearner.com\/en\/wp-json\/wp\/v2\/comments?post=1099"}],"version-history":[{"count":3,"href":"https:\/\/rtlearner.com\/en\/wp-json\/wp\/v2\/posts\/1099\/revisions"}],"predecessor-version":[{"id":1227,"href":"https:\/\/rtlearner.com\/en\/wp-json\/wp\/v2\/posts\/1099\/revisions\/1227"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/rtlearner.com\/en\/wp-json\/wp\/v2\/media\/1101"}],"wp:attachment":[{"href":"https:\/\/rtlearner.com\/en\/wp-json\/wp\/v2\/media?parent=1099"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/rtlearner.com\/en\/wp-json\/wp\/v2\/categories?post=1099"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/rtlearner.com\/en\/wp-json\/wp\/v2\/tags?post=1099"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}<!-- This website is optimized by Airlift. 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