In this article, I will explain the issues I encountered while working on the photo process during my master's degree, mainly related to PEB (Post-expose baking) and Lift-off.
PEB(Post-expose baking)
Baking is performed after exposure and before development, called PEB. Of the three baking steps in the photo process, PEB is the most sensitive in my experience because it affects the PR profile.
The photo above is a SEM image of the profile after the photo process. The photo on the left shows 60 nm of TiN deposited on top of a patterned 1 μm PR layer. You can see that the wall is very irregular. This can be due to several reasons, but one of them is an unstable PR wall.
The photo on the right shows the PR profile when PEB processing was not properly performed. It looks very bumpy, and that's because of the standing wave.
Standing wave
When waves overlap, constructive or destructive interference occurs.
- Constructive interference: interference in which the amplitude increases when the phases of two waves are the same.
- Destructive interference: interference in which the amplitude is reduced when the phases of two waves are opposite.
Because light also possesses wave properties, when it travels and is reflected, the traveling and reflected light interfere with each other. As a result, the wave appears to vibrate in place, a phenomenon called a standing wave.
As you can see in the figure above, the node where destructive interference occurs has a larger amplitude difference than other points. From the PR's perspective, when UV light reflects off the wafer and this standing wave phenomenon occurs, a bumpy, wave-like profile is formed after development. PEB is the process of evenly dispersing the PAC (Photo Active Compound), which has not reacted evenly within the PR due to the standing wave effect, throughout the PR.
Of course, we use the lift-off method, which will be explained later. Since the PR thickness is 1㎛ and the deposited film is only 10-50nm, the PR profile shouldn't be a major issue. However, because this isn't a normal process environment, we decided to optimize the recipe.
The original PEB process recipe used baking at 100 degrees for 2 minutes, but raising the temperature to 120 degrees helped alleviate the standing wave phenomenon.
ARC (Anti Reflective Coating)
The standing wave phenomenon during the photolithography process occurs because UV light reflects off the wafer. In addition to photolithography (PEB), there's a way to minimize standing waves: applying an anti-reflection coating (ARC). This phenomenon can be prevented by depositing an anti-reflection coating, such as SiON, using CVD prior to the photolithography process.
Lift-off
The lift-off process proceeds in the following order:
- Patterning through photo process
- Deposition on a patterned substrate
- PR removal (lift-off)
We performed lift-off by immersing the substrate, which had already been deposited, in an acetone solution to remove the PR. It's recommended to use negative PR during the lift-off process because of its PR profile.
So let's see what problems can arise with the profile when patterning in this way.
Lift-off issue
First, let's look at the picture below.
This is the situation before the PR was blown off with acetone. Depending on the type of PR, the profile shown above appears after the photo process. In the case of positive PR, the PR is also deposited on the PR wall, connecting with the thin film actually deposited on the wafer, causing problems when the PR is removed.
The photo above shows the PR profile when using negative PR (more precisely, positive PR was used and subjected to a flood-exposure process). However, you can still see a thin film deposited on the PR wall, extending all the way to the substrate. In this case, removing the PR will cause issues at the edges of the thin film.
The photo above was taken using atomic force microscopy (AFM) in non-contact mode after the lift-off process. The thin film is deposited in long, linear lines, extending from left to right. The edges appear problematic, don't you think? This can also be confirmed with an SEM.
This process is not feasible, so we use a chemical called LOR.
LOR coating
LOR is used as a coating on the wafer before PR coating, and it plays a role in creating a gap between the wafer and PR.
If you look at the picture above, you can see a 200nm layer beneath the 1.5㎛ thick PR. This is LOR. PR changes its properties when exposed to UV light and is divided into developer-soluble and non-soluble parts, but LOR is unaffected by UV light and dissolves in the developer. Therefore, the developer penetrates even under the PR that is not removed, and the LOR is etched laterally.
One thing to keep in mind when using LOR is that the develop time must be strictly observed. Over-immersion in the developer can cause the LOR to etch excessively, causing the PR to tilt and even collapse. Furthermore, since the LOR is only 200 nm (this varies depending on the spin-coating rpm), using LOR for depositions exceeding this limit is pointless.
References: SK hynix Semiconductor Lecture
